Emitter Feedback Bias:
Figure 1, shows emitter feedback bias circuit. In this circuit, voltage across the resistor RE is used to offset the changes in bdc. If the bdc increases, the collector current increases. This increases emitter voltage which decreases the voltage across the base resistor and reduces the base current. The reduced base current result in the less collector current, which offsets the original increase in bdc partially. The feedback term is used because output current ( IC) creates a change in input current ( IB ). RE is common in both input and output circuits.
Figure 1
In this case
Since IE = IC + IB
Therefore,
In this case, S is less compared to fixed bias circuit. Thus the stability of the Q point is better. Further,
If IC is to be made insensitive to βdc than
RE cannot be made large enough to swamp out the effects of βdc without saturating the transistor.
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