(1) The 'NAND' gate: From 'AND' and 'NOT' gate
![1654_Combination of Logic Gates.png](https://www.expertsmind.com/../CMSImages/1654_Combination of Logic Gates.png)
Boolean expression and truth table: ![684_Combination of Logic Gates4.png](https://www.expertsmind.com/CMSImages/684_Combination%20of%20Logic%20Gates4.png)
A
|
B
|
Y¢ = A × B
|
Y
|
0
|
0
|
0
|
1
|
0
|
1
|
0
|
1
|
1
|
0
|
0
|
1
|
1
|
1
|
1
|
0
|
(2) The 'NOR' gate: From 'OR' and 'NOT' gate
![599_Combination of Logic Gates1.png](https://www.expertsmind.com/../CMSImages/599_Combination of Logic Gates1.png)
Boolean expression and truth table:
A
|
B
|
Y¢ = A + B
|
Y
|
0
|
0
|
0
|
1
|
0
|
1
|
1
|
0
|
1
|
0
|
1
|
0
|
1
|
1
|
1
|
0
|
(3) The 'XOR' gate: From 'NOT', 'AND' and 'OR' gate. Called as exclusive OR gate.
It may be noted that if both the inputs of the XOR gate is 1, then the output is 0.
![788_Combination of Logic Gates2.png](https://www.expertsmind.com/../CMSImages/788_Combination of Logic Gates2.png)
Boolean expression and truth table: Y = A Å B = ![30_Combination of Logic Gates2.png](https://www.expertsmind.com/../CMSImages/30_Combination of Logic Gates2.png)
A
|
B
|
Y
|
0
|
0
|
0
|
0
|
1
|
1
|
1
|
0
|
1
|
1
|
1
|
0
|
(4) The exclusive nor (XNOR) gate: XOR + NOT XNOR
![228_Combination of Logic Gates4.png](https://www.expertsmind.com/../CMSImages/228_Combination of Logic Gates4.png)
Boolean expression: Y = A ¤ B =![871_Combination of Logic Gates3.png](https://www.expertsmind.com/../CMSImages/871_Combination of Logic Gates3.png)
Logic Gates Using 'NAND' Gate
The NAND gate is the building block of the digital electronics. All the logic gates like the OR, the AND and the NOT can be constructed from the NAND gates.
(1) Construction of the ' NOT' gate circuit from the ' NAND' gate
(i) When both the inputs (A and B) of the NAND gate are joined together then it works as the NOT gate.
(ii) Truth table and logic symbol
Input
|
Output
|
A = B
|
Y
|
0
|
1
|
1
|
0
|
![21_Combination of Logic Gates6.png](https://www.expertsmind.com/../CMSImages/21_Combination of Logic Gates6.png)
(2) Construction of the 'AND' gate from the 'NAND' gate:
(i) When the output of the NAND gate is given to the input of the NOT gate (made from the NAND gate), then the final logic circuit behaves as the AND gate
(ii) Truth table and logic symbol
A
|
B
|
Y¢
|
Y
|
0
|
0
|
1
|
0
|
0
|
1
|
1
|
0
|
1
|
0
|
1
|
0
|
1
|
1
|
0
|
1
|
![2369_Combination of Logic Gates7.png](https://www.expertsmind.com/../CMSImages/2369_Combination of Logic Gates7.png)
(3) Construction of the 'OR' gate by the 'NAND' gate
(i) When the outputs of two NOT gates (obtained from the NAND gate) is given to the inputs of the NAND gate, the final logic circuit behaves as the OR gate
(ii) Truth table and logic symbol
A
|
B
|
|
|
Y
|
0
|
0
|
1
|
1
|
0
|
0
|
1
|
1
|
0
|
1
|
1
|
0
|
0
|
1
|
1
|
1
|
1
|
0
|
0
|
1
|
![1616_Combination of Logic Gates8.png](https://www.expertsmind.com/CMSImages/1616_Combination%20of%20Logic%20Gates8.png)
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