Asynchronous sequential logic

The asynchronous sequential logic expresses the effect of memorizing by fixing the moments of time, when the digital device changes the state of it. These moments can be represented not in explicit form, but by taking into account the principle "before or after" in the temporal relations of the logical values.

For the asynchronous logic it is adequate to conclude the sequence of the switchings irrespective of the connections of corresponding moments with the real or virtual time. Theoretical apparatus of the sequential logic comprises of mathematical instruments of sequention and venjunction as well as of the logic-algebraic equations on the basis of them.

The asynchronous sequential circuit is sequential circuit the behavior of which depends only on the order in which input signals change and can be affected any time.

Memory elements are either latches or time-delay elements (instead of clocked FFs as in the synchronous sequential circuit).
+ An asynchronous sequential circuit resembles a combinational circuit with feedback quite often.
+ Faster and cheaper than the synchronous ones, but much difficult to design, verify, or test (because of possible timing problems involved in feedback path).

Analysis Procedure

The analysis consists of obtaining a table or a diagram that describes the sequence of internal states and outputs as a function of changes in the input variables.
1. Determine the feedback loops which are existing.
2. Designate each feedback-loop output with Yi and its corresponding input with yi for i= 1; : : : ; k, here k is number of the feedback loops.
3. Derive boolean functions for all the Y”s.

4. Plot transition table from equations.

Design Procedure

1. Create a primitive flow table.
2. Then reduce the flow table.
3. Assign binary state variables to obtain the transition table.
4. Assign output values to the dashes to obtain the output maps.
5. Simplify the excitation and output functions.
6. Draw the logic diagram.

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