Half adder
A half adder is a logical circuit which performs the addition operation on 2 one-bit binary numbers written as A and B. The half adder output is the sum of the 2 inputs commonly represented by the signals Cout and S where . Following is logic table for the half adder:
![2486_adder.png](https://www.expertsmind.com/CMSImages/2486_adder.png)
Inputs Outputs
A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
S=A (XOR) B C=AB
Full Adder
A full adder is a logical circuit which performs an addition operation on 3 one- bit binary numbers written as A, B, and Cin. The full adder obtains a two-bit output sum represented with the signals Cout and S.
A
0
|
B
0
|
Ci
0
|
Co
0
|
S
0
|
1
|
0
|
0
|
0
|
1
|
0
|
1
|
0
|
0
|
1
|
1
|
1
|
0
|
1
|
0
|
0
|
0
|
1
|
0
|
1
|
1
|
0
|
1
|
1
|
0
|
0
|
1
|
1
|
1
|
0
|
1
|
1
|
1
|
1
|
1
|
|
|
Inputs Outputs
![516_adder1.png](https://www.expertsmind.com/../CMSImages/516_adder1.png)
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