Multiple instruction and multiple data stream (mimd), Computer Engineering

Assignment Help:

Multiple Instruction and Multiple Data stream (MIMD)

In this association, multiple control units and multiple processing elements are prepared as in MISD. But the discrepancy is that now in this association multiple instruction streams function on multiple data streams . Thus, for handling multiple control units, multiple instruction streams and multiple processing elements are organized in the way of  multiple processing elements are conducting multiple data streams from the Main memory as given  in Figure 7. The processors work on their own given data with their own instructions. Tasks implemented by different processors can start or finish at dissimilar times. They are not lock-stepped, as in SIMD computers, although run asynchronously. This classification actually distinguished the parallel computer. That means in the actual sense MIMD organisation is supposed to be a Parallel computer. All multiprocessor systems drop under this classification. Examples include; Burroughs D825, Cray X-MP, C.mmp Cray-2, S1, HEP, Pluribus, Univac 1100/80, IBM 370/168 MP, Tandem/16, IBM 3081/3084, BBN Butterfly, C.m*, FPS T/40000, iPSC, Meiko Computing Surface (CS-1),.

This type of computer organisation is indicated as:

                                                                           Is > 1

                                                                           Ds > 1

                          2217_Multiple Instruction and Multiple Data stream (MIMD).png

Of the classifications discussed over, MIMD organization is the most accepted for a parallel computer. In the actual sense, parallel computers implement the instructions in MIMD mode.


Related Discussions:- Multiple instruction and multiple data stream (mimd)

Ip fragmentation of user datagarm, IP specified that datagram can arrive in...

IP specified that datagram can arrive in a different order than they were sent. If a fragment from one datagram arrives at a destination before all the segments from a previous dat

Define the difference between union and structure, Define the difference be...

Define the difference between union and structure The main difference between union and structure is the storage allocation. In Union , for each variable the compiler allocates

Parallel random access machines, PRAM is one among the models which are use...

PRAM is one among the models which are used for designing the parallel algorithm as shown in Figure. The PRAM model comprises the following components: i)  A group of identical

What is a parent class of all java classes, Parent class of all Java classe...

Parent class of all Java classes is? All Java class's parent class is java. lang.object.

What is the basic workflow order for color match, Question: (a) What is...

Question: (a) What is the difference between the Color Pass and the Color Replace effects? (b) What is the basic workflow order for Color Match? (c) Explain clearly the

Explain assembly language, Explain Assembly Language This is a family o...

Explain Assembly Language This is a family of low-level language for programming computers, microprocessors, microcontrollers etc. They implement a symbolic sign of the numeric

How are the function code handles in flow logic, How are the function code ...

How are the function code handles in Flow Logic? When the User selects a function in a transaction, the system copies the function code into a           specially   designated

Data transmission and modems, Q. What is Data Transmission and Modems? ...

Q. What is Data Transmission and Modems? Data can be transferred between two stations in either serial or parallel transmission. Parallel data transmission, in which a group of

What are the static and dynamic hazards in logic circuits, If for a short p...

If for a short period of time circuits goes to some dissimilar logic level then it is assumed to have then it is known as static hazard e.g. If the final logic value of output of a

Classification of interrupts - computer architecture, Classification of int...

Classification of interrupts:   1. a) asynchronous   external components or hardware malfunction 1.b)synchronous   function of program state (for example over

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd